In electronics, a pinout (sometimes written " pin-out") is a cross-reference between the contacts, or pins, of an electrical connector or electronic component, and their functions. "Pinout" now supersedes the term "basing diagram" which was the standard terminology used by the manufacturers of Vacuum tube and the Radio Manufacturers Association (RMA). The RMA started its standardization in 1934, collecting and correlating tube data for registration at what was to become the Electronic Industries Alliance (EIA), which now has many sectors reporting to it and sets what is known as EIA standards where all registered pinouts and Registered Jack can be found.
Suppose one has specified wires within a cable (for instance, the colored Ethernet cable wires in ANSI/TIA-568 T568A). In that case, the order in which different color wires are attached to pins of an electrical connector defines the wiring scheme. In any multi-pin connector, there are multiple ways to map wires to pins, so different configurations may be created that superficially look identical but function differently. Pinouts define these configurations. Many connectors have multiple standard pinouts in use for different manufacturers or applications.
While repairing electronic devices, an electronics technician uses electronic test equipment to " pin out" each component on a PCB. The technician probes each pin of the component in turn, comparing the expected signal on each pin to the actual signal on that pin.
Data |
Not used |
Ground |
+5V Common-collector voltage |
Clock signal |
Not used |
The 6th sequential output |
The 2nd sequential output |
The 1st sequential output |
The 3rd sequential output |
The 7th sequential output |
The 8th sequential output |
The 4th sequential output |
The connection to the 0 V rail |
The 9th sequential output |
The 5th sequential output |
The 10th sequential output |
Carry out output - outputs high on counts 0 to 4, outputs low on counts 5 to 9 (thus a transition from low to high occurs when counting from 9 back to 0) |
Clock enable - inhibits the clock when high (i.e., the chip counts when EN is low) |
Cloc k in |
Master Reset - sets outputs Q0 and CO high and outputs Q1 through Q9 low, when taken high |
The connection to the +V rail (voltage between +3 V and +18 V) |
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