Product Code Database
Epyc (stylized as EPYC) is a brand of multi-core x86-64 designed and sold by AMD, based on the company's Zen microarchitecture. Introduced in June 2017, they are specifically targeted for the server and embedded system markets.
Epyc processors share the same microarchitecture as their regular desktop-grade counterparts, but have enterprise-grade features such as higher core counts, more PCI Express lanes, support for larger amounts of RAM, support for ECC memory, and larger CPU cache. They also support multi-chip and dual-socket system configurations by using the Infinity Fabric interconnect.
In March 2021, AMD launched the Epyc 7003 "Milan" series, based on the Zen 3 microarchitecture. Epyc Milan brought the same 64 cores as Epyc Rome, but with much higher per-core performance, with the Epyc 7763 beating the Epyc 7702 by up to 22 percent despite having the same number of cores and threads. A refresh of the Epyc 7003 "Milan" series with 3D V-Cache, named Milan-X, launched on March 21, 2022, using the same cores as Milan, but with an additional 512 MB of cache stacked onto the compute dies, bringing the total amount of cache per CPU to 768 MB.
In September 2021, Oak Ridge National Laboratory partnered with AMD and Cray to build Frontier, a supercomputer with 9,472 Epyc 7453 CPUs and 37,888 AMD Instinct MI250X GPUs, becoming operational by May 2022. As of November 2023, it is the most powerful supercomputer in the world according to the TOP500, with a peak performance of over 1.6 FLOPS.
In November 2021, AMD detailed the upcoming generations of Epyc, and unveiled the new LGA-6096 SP5 socket that would support the new generations of Epyc chips. Codenamed Genoa, these CPUs are based on the Zen 4 microarchitecture and built on TSMC's N5 node, supporting up to 96 cores and 192 threads per socket, alongside 12 channels of DDR5 and 128 PCIe 5.0 lanes. Genoa also became the first x86 server CPU to support Compute Express Link 1.1, or CXL, allowing for further expansion of memory and other devices with a high bandwidth interface built on PCIe 5.0. AMD also shared information regarding the sister chip of Genoa, codenamed Bergamo. Bergamo is based on a modified version of Zen 4 named Zen 4c, designed to allow for much higher core counts and efficiency at the cost of lower single-core performance, targeting Cloud computing and workloads, compared to traditional high performance computing workloads. It is compatible with Socket SP5, and supports up to 128 cores and 256 threads per socket.
In November 2022, AMD launched their 4th generation Epyc "Genoa" series of CPUs. Some tech reviewers and customers had already received hardware for testing and benchmarking, and third party benchmarks of Genoa parts were immediately available. The flagship part, the 96 core Epyc 9654, set records for multi-core performance, and showed up to 4× performance compared to Intel's flagship part, the Xeon Platinum 8380. High memory bandwidth and extensive PCIe connectivity removed many bottlenecks, allowing all 96 cores to be utilized in workloads where previous generation Milan chips would have been I/O-bound.
In June 2023, AMD began shipping the 3D V-Cache enabled Genoa-X lineup, a variant of Genoa that uses the same 3D die stacking technology as Milan-X to enable up to 1152 MB of L3 cache, a 50% increase over Milan-X, which had a maximum of 768 MB of L3 cache. On the same day, AMD also announced the release of their cloud optimized Zen 4c SKUs, codenamed Bergamo, offering up to 128 cores per socket, utilizing a modified version of the Zen 4 core that was optimized for power efficiency and to reduce die space. Zen 4c cores do not have any instructions removed compared to standard Zen 4 cores; instead, the amount of L3 cache per CCX is reduced from 32 to 16 MB, and the frequency of the cores is reduced. Bergamo is socket compatible with Genoa, using the same SP5 socket and supporting the same CXL, PCIe, and DDR5 capacity as Genoa.
In September 2023, AMD launched their low power and embedded 8004 series of CPUs, codenamed Siena. Siena utilizes a new socket, called SP6, which has a smaller footprint and pin count than the SP5 socket of its contemporary Genoa processors. Siena utilizes the same Zen 4c core architecture as Bergamo cloud native processors, allowing up to 64 cores per processor, and the same 6 nm I/O die as Bergamo and Genoa, although certain features have been cut down, such as reducing the memory support from 12 channels of DDR5 to only 6, and removing dual socket support.
In May 2024, AMD launched the new 4004 series of CPUs, codenamed Raphael. Sharing the same AM5 socket as desktop Ryzen CPUs. In contrast to desktop parts ECC memories are supported. AM5 motherboard manufacturers do not support the 4004 so available options are very limited to devices which are not suitable for desktop use.
On October 10, 2024, AMD launched the new 9005 series of CPUs, codenamed Turin. Sharing the same SP5 socket as Genoa and Bergamo, Turin came with numerous platform advancements, including the support for up to 6400 MT/s DDR5 memory. Turin also increased the core count and frequency offerings, with Turin offering 128 Zen 5 cores per socket, and Turin Dense offering 192 Zen 5c cores per socket. And with the highest frequency SKU (The EPYC 9575F) having a operating frequency of up to 5 GHz.
AMD Epyc CPU codenames follow the naming scheme of Italian cities, including Milan, Rome, Naples, Genoa, Bergamo, Siena, Turin and Venice.
| + AMD Epyc CPU generations | ||||||
| 1st | 2017 | Naples | 7001 series | 32 × Zen | SP3 (LGA) | DDR4 |
| 2nd | 2019 | Rome | 7002 series | 64 × Zen 2 | ||
| 3rd | 2021 | Milan | 7003 series | 64 × Zen 3 | ||
| 2022 | Milan-X | |||||
| 4th | Genoa | 9004 series | 96 × Zen 4 | SP5 (LGA) | DDR5 | |
| 2023 | Genoa-X | |||||
| Bergamo | 128 × Zen 4c | |||||
| Siena | 8004 series | 64 × Zen 4c | SP6 (LGA) | |||
| 2024 | Raphael | 4004 series | 16 × Zen 4 | AM5 (LGA) | ||
| 5th | Turin | 9005 series | 128 × Zen 5 | SP5 (LGA) | ||
| Turin Dense | 192 × Zen 5c | |||||
| 2025 | Grado | 4005 series | 16 × Zen 5 | AM5 (LGA) | ||
| 1st | 2018 | Snowy Owl | Embedded 3001 series | 16 × Zen | SP4 (BGA) | DDR4 |
| 2019 | Naples | Embedded 7001 series | 32 × Zen | SP3 (BGA) | ||
| 2nd | 2021 | Rome | Embedded 7002 series | 64 × Zen 2 | ||
| 3rd | 2022 | Milan | Embedded 7003 series | 64 × Zen 3 | ||
| 4th | 2023 | Genoa | Embedded 9004 series | 96 × Zen 4 | SP5 (BGA) | DDR5 |
| Siena | Embedded 8004 series | 64 × Zen 4c | SP6 (BGA) | |||
| 5th | 2025 | Turin | Embedded 9005 series | 128 × Zen 5 | SP5 (BGA) | |
| Turin Dense | 192 × Zen 5c |
Epyc CPUs supports both single socket and dual socket operation. In a dual socket configuration, 64 PCI Express lanes from each CPU are allocated to AMD's proprietary HyperTransport interconnect to allow for full bandwidth between both CPUs. Thus, a dual socket configuration has the same number of usable PCIe lanes as a single socket configuration. First generation Epyc CPUs had 128 PCIe 3.0 lanes, while second and third generation had 128 PCIe 4.0 lanes. All current Epyc CPUs are equipped with up to eight channels of DDR4 at varying speeds, though next gen Genoa CPUs are confirmed by AMD to support up to twelve channels of DDR5.
Unlike Opteron, Intel equivalents and AMD's desktop processors (excluding Socket AM1), Epyc processors are chipset-free - also known as system on a chip. That means most features required to make servers fully functional (such as memory, PCI Express, SATA controllers, etc.) are fully integrated into the processor, eliminating the need for a chipset to be placed on the mainboard. Some features may require the use of additional controller chips to utilize.
Epyc Genoa was well received, as it offered improved performance and efficiency compared to previous offerings, though received some criticism for not having 2 per channel configurations validating, with some reviewers calling it an "incomplete platform".
In April 2020, AMD launched three new SKUs using Epyc's 7nm Rome platform. The three processors introduced were the eight-core Epyc 7F32, the 16-core 7F52 and the 24-core 7F72, featuring base clocks up to 3.7 GHz (up to 3.9 GHz with boost) within a TDP range of 180 to 240 watts. The launch was supported by Dell EMC, Hewlett Packard Enterprise, Lenovo, Supermicro, and Nutanix.
Milan CPUs were launched by AMD on March 15, 2021.
Milan-X CPUs were launched March 21, 2022. They use 3D V-Cache technology to increase the maximum L3 cache per socket capacity from 256 MB to 768 MB.
On June 13, 2023, AMD introduced Genoa-X with 3D V-Cache technology for technical computing performance and Bergamo (9734, 9754 and 9754S) for cloud native computing.
On September 18, 2023, AMD introduced the low power Siena lineup of processors, based on the Zen 4c microarchitecture. Siena supports up to 64 cores on the new SP6 socket, which is currently only used by Siena processors. Siena uses the same I/O die as Bergamo, however certain features, such as dual socket support, are removed, and other features are reduced, such as the change from 12 channel memory support to 6 channel memory support.
In May 2024, AMD launched the Raphael lineup of processors, based on the Zen4 microarchitecture. Raphael support up to 16 cores on the AM5 socket.
Turin Dense support the x2AVIC CPU feature
Both of these processor series will be socket-compatible with the SP5 socket used by Genoa and Bergamo. Epyc 9005 series were launched on October 10, 2024, at AMD's Advancing AI event 2024.
In May 2025, AMD announced the Epyc 4005 series of processors, codenamed Grado. They are based on the Zen 5 microarchitecture and support up to 16 cores. Unlike the 9005 series, these processors are Socket AM5 compatible.
|
|
